STAGE GAIN CHARTS

Ref:    Para 104, R-392 Manual

Connect VTVM or DVM between the diode load (red test jack J615) and ground. 
Connect signal generator output to antenna (via 50 micro-micro farad cap) or
to internal points (via .05 microfarad cap); ensure sig gen ground is also connected
to receiver ground.  Table signal generator voltages are the minimum and maximum
sig gen output required to generate -2.5 volts across the diode load.

RF Subchassis Stages.
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Signal generator connection point       Frequency (MC)  Sig Gen output (microvolts)
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ANT binding post, E101                  0.5 to 32               1 to 4
Test Point E201 (grid of V201)          0.5 to 32               3 to 7
Test Point E202 (grid of V202)          0.5 to 32               3 to 7
Test Point E203 (grid of V203)          0.5 to 8                25 to 45
Test Point E204 (grid of V204)          8 to 32                 20 to 35
Test Point J808 (grid of V801)          3 to 2                  40 to 70
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IF Subchassis Stages.  (Generator set to 455 KHz)
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Sig Gen                       Sig Gen output (microvolts)
Connection Point        2 KC BW         4 KC BW         8 KC BW
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Grid of V501            130-180
Grid of V502            3300-6000       3200-5900       2900-5700
Grid of V503            24000-41000     28000-45000     22000-38000
Grid of V504            25000-40000     25000-40000     23000-37000
Grid of V505            22000-34000     22000-32000     25000-35000
Grid of V506            50000-70000     50000-70000     50000-70000
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